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Contents: Volume E90-A, Number 12, December 2007   [Index by Author] 

Down Special Section on VLSI Design and CAD Algorithms
Papers
Physical Design
Letter
Memory Design and Test
Papers
Memory Design and Test
Letter
Circuit Synthesis
Papers
Circuit Synthesis
Logic Synthesis and Verification
System Level Design
Down Regular Section
Papers
Engineering Acoustics
Digital Signal Processing
Analog Signal Processing
VLSI Design Technology and CAD
Numerical Analysis and Optimization
Reliability, Maintainability and Safety Analysis
Information Security
Neural Networks and Bioengineering
Letters
Engineering Acoustics
Digital Signal Processing
Systems and Control
Information Security
Information Theory
Communication Theory and Signals
Image
Concurrent Systems


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Table of Contents (PDF)

To see an article, click its [Full Text] or [PDF] link. To review many abstracts, check the boxes to the left of the titles you want, and click the 'Get All Checked Abstract(s)' button. To see one abstract at a time, click its [Abstract] link.

Special Section on VLSI Design and CAD Algorithms Back

Yusuke Matsunaga
Special Section on VLSI Design and CAD Algorithms
IEICE Trans Fundamentals 2007 E90-A: 2649-2650; doi:10.1093/ietfec/e90-a.12.2649 [PDF]  

Papers Back

Physical Design Back

Daisuke KOSAKA, Makoto NAGATA, Yoshitaka MURASAKA, and Atsushi IWATA
Chip-Level Substrate Coupling Analysis with Reference Structures for Verification
IEICE Trans Fundamentals 2007 E90-A: 2651-2660; doi:10.1093/ietfec/e90-a.12.2651 [Abstract] [PDF] [References]  

Masanori HASHIMOTO, Junji YAMAGUCHI, and Hidetoshi ONODERA
Timing Analysis Considering Spatial Power/Ground Level Variation
IEICE Trans Fundamentals 2007 E90-A: 2661-2668; doi:10.1093/ietfec/e90-a.12.2661 [Abstract] [PDF] [References]  

Hiroshi KAWAGUCHI, Danardono Dwi ANTONO, and Takayasu SAKURAI
Closed-Form Expressions for Crosstalk Noise and Worst-Case Delay on Capacitively Coupled Distributed RC Lines
IEICE Trans Fundamentals 2007 E90-A: 2669-2681; doi:10.1093/ietfec/e90-a.12.2669 [Abstract] [PDF] [References]  

Hirokazu MUTA and Hidetoshi ONODERA
Manufacturability-Aware Design of Standard Cells
IEICE Trans Fundamentals 2007 E90-A: 2682-2690; doi:10.1093/ietfec/e90-a.12.2682 [Abstract] [PDF] [References]  

Letter Back

Memory Design and Test Back

Masaaki IIJIMA, Kayoko SETO, Masahiro NUMA, Akira TADA, and Takashi IPPOSHI
Look-Ahead Dynamic Threshold Voltage Control Scheme for Improving Write Margin of SOI-7T-SRAM
IEICE Trans Fundamentals 2007 E90-A: 2691-2694; doi:10.1093/ietfec/e90-a.12.2691 [Abstract] [PDF] [References]  

Papers Back

Memory Design and Test Back

Yasuhiro MORITA, Hidehiro FUJIWARA, Hiroki NOGUCHI, Yusuke IGUCHI, Koji NII, Hiroshi KAWAGUCHI, and Masahiko YOSHIMOTO
Area Comparison between 6T and 8T SRAM Cells in Dual-Vdd Scheme and DVS Scheme
IEICE Trans Fundamentals 2007 E90-A: 2695-2702; doi:10.1093/ietfec/e90-a.12.2695 [Abstract] [PDF] [References]  

Jin-Fu LI and Chao-Da HUANG
An Efficient Diagnosis Scheme for RAMs with Simple Functional Faults
IEICE Trans Fundamentals 2007 E90-A: 2703-2711; doi:10.1093/ietfec/e90-a.12.2703 [Abstract] [PDF] [References]  

Letter Back

Circuit Synthesis Back

Masanori HASHIMOTO, Takahito IJICHI, Shingo TAKAHASHI, Shuji TSUKIYAMA, and Isao SHIRAKAWA
Transistor Sizing of LCD Driver Circuit for Technology Migration
IEICE Trans Fundamentals 2007 E90-A: 2712-2717; doi:10.1093/ietfec/e90-a.12.2712 [Abstract] [PDF] [References]  

Papers Back

Circuit Synthesis Back

Tsung-Yi WU and Jr-Luen TZENG
A Fast Probability-Based Algorithm for Leakage Current Reduction Considering Controller Cost
IEICE Trans Fundamentals 2007 E90-A: 2718-2726; doi:10.1093/ietfec/e90-a.12.2718 [Abstract] [PDF] [References]  

Yow-Tyng NIEH, Shih-Hsu HUANG, and Sheng-Yu HSU
Opposite-Phase Clock Tree for Peak Current Reduction
IEICE Trans Fundamentals 2007 E90-A: 2727-2735; doi:10.1093/ietfec/e90-a.12.2727 [Abstract] [PDF] [References]  

Bakhtiar Affendi ROSDI and Atsushi TAKAHASHI
Low Area Pipelined Circuits by the Replacement of Registers with Delay Elements
IEICE Trans Fundamentals 2007 E90-A: 2736-2742; doi:10.1093/ietfec/e90-a.12.2736 [Abstract] [PDF] [References]  

Kunihiko YANAGIBASHI, Yasuhiro TAKASHIMA, and Yuichi NAKAMURA
A Relocation Method for Circuit Modifications
IEICE Trans Fundamentals 2007 E90-A: 2743-2751; doi:10.1093/ietfec/e90-a.12.2743 [Abstract] [PDF] [References]  

Logic Synthesis and Verification Back

Shinobu NAGAYAMA, Tsutomu SASAO, and Jon T. BUTLER
Design Method for Numerical Function Generators Using Recursive Segmentation and EVBDDs
IEICE Trans Fundamentals 2007 E90-A: 2752-2761; doi:10.1093/ietfec/e90-a.12.2752 [Abstract] [PDF] [References]  

Munehiro MATSUURA and Tsutomu SASAO
BDD Representation for Incompletely Specified Multiple-Output Logic Functions and Its Applications to the Design of LUT Cascades
IEICE Trans Fundamentals 2007 E90-A: 2762-2769; doi:10.1093/ietfec/e90-a.12.2762 [Abstract] [PDF] [References]  

Taeko MATSUNAGA and Yusuke MATSUNAGA
Timing-Constrained Area Minimization Algorithm for Parallel Prefix Adders
IEICE Trans Fundamentals 2007 E90-A: 2770-2777; doi:10.1093/ietfec/e90-a.12.2770 [Abstract] [PDF] [References]  

Hiroaki KOZAWA, Kiyoharu HAMAGUCHI, and Toshinobu KASHIWABARA
Satisfiability Checking for Logic with Equality and Uninterpreted Functions under Equivalence Constraints
IEICE Trans Fundamentals 2007 E90-A: 2778-2789; doi:10.1093/ietfec/e90-a.12.2778 [Abstract] [PDF] [References]  

System Level Design Back

Hiroshi SAITO, Naohiro HAMADA, Nattha JINDAPETCH, Tomohiro YONEDA, Chris MYERS, and Takashi NANYA
Scheduling Methods for Asynchronous Circuits with Bundled-Data Implementations Based on the Approximation of Start Times
IEICE Trans Fundamentals 2007 E90-A: 2790-2799; doi:10.1093/ietfec/e90-a.12.2790 [Abstract] [PDF] [References]  

Hiroaki TANAKA, Yoshinori TAKEUCHI, Keishi SAKANUSHI, Masaharu IMAI, Hiroki TAGAWA, Yutaka OTA, and Nobu MATSUMOTO
Generation of Pack Instruction Sequence for Media Processors Using Multi-Valued Decision Diagram
IEICE Trans Fundamentals 2007 E90-A: 2800-2809; doi:10.1093/ietfec/e90-a.12.2800 [Abstract] [PDF] [References]  

Kohei HOSOKAWA, Katsunori TANAKA, and Yuichi NAKAMURA
Efficient Memory Utilization for High-Speed FPGA-Based Hardware Emulators with SDRAMs
IEICE Trans Fundamentals 2007 E90-A: 2810-2817; doi:10.1093/ietfec/e90-a.12.2810 [Abstract] [PDF] [References]  

Chun-Lung HSU and Mean-Hom HO
High-Efficiency VLSI Architecture Design for Motion-Estimation in H.264/AVC
IEICE Trans Fundamentals 2007 E90-A: 2818-2825; doi:10.1093/ietfec/e90-a.12.2818 [Abstract] [PDF] [References]  

Regular Section Back

Papers Back

Engineering Acoustics Back

Kazunori KOBAYASHI, Ken'ichi FURUYA, Yoichi HANEDA, and Akitoshi KATAOKA
An Approach to Solve Local Minimum Problem in Sound Source and Microphone Localization
IEICE Trans Fundamentals 2007 E90-A: 2826-2834; doi:10.1093/ietfec/e90-a.12.2826 [Abstract] [PDF] [References]  

Digital Signal Processing Back

Akihide HORITA, Kenji NAKAYAMA, and Akihiro HIRANO
A Distortion-Free Learning Algorithm for Feedforward Multi-Channel Blind Source Separation
IEICE Trans Fundamentals 2007 E90-A: 2835-2845; doi:10.1093/ietfec/e90-a.12.2835 [Abstract] [PDF] [References]  

Analog Signal Processing Back

Koji ASAMI
An Algorithm to Improve the Performance of M-Channel Time-Interleaved A-D Converters
IEICE Trans Fundamentals 2007 E90-A: 2846-2852; doi:10.1093/ietfec/e90-a.12.2846 [Abstract] [PDF] [References]  

VLSI Design Technology and CAD Back

Yuko HARA, Hiroyuki TOMIYAMA, Shinya HONDA, Hiroaki TAKADA, and Katsuya ISHII
Function-Level Partitioning of Sequential Programs for Efficient Behavioral Synthesis
IEICE Trans Fundamentals 2007 E90-A: 2853-2862; doi:10.1093/ietfec/e90-a.12.2853 [Abstract] [PDF] [References]  

Numerical Analysis and Optimization Back

Sang-Moon SOAK
'Adaptive Link Adjustment' Applied to the Fixed Charge Transportation Problem
IEICE Trans Fundamentals 2007 E90-A: 2863-2876; doi:10.1093/ietfec/e90-a.12.2863 [Abstract] [PDF] [References]  

Soon LEE, Seung-Mook BAEK, Jung-Wook PARK, and Young-Hyun MOON
Kalman-Filter Based Estimation of Electric Load Composition with Non-ideal Transformer Modeling
IEICE Trans Fundamentals 2007 E90-A: 2877-2883; doi:10.1093/ietfec/e90-a.12.2877 [Abstract] [PDF] [References]  

Shieh-Shing LIN
A Parallel Algorithm for NMNF Problems with a Large Number of Capacity Constraints
IEICE Trans Fundamentals 2007 E90-A: 2884-2890; doi:10.1093/ietfec/e90-a.12.2884 [Abstract] [PDF] [References]  

Reliability, Maintainability and Safety Analysis Back

Shinji INOUE and Shigeru YAMADA
Discrete Program-Size Dependent Software Reliability Assessment: Modeling, Estimation, and Goodness-of-Fit Comparisons
IEICE Trans Fundamentals 2007 E90-A: 2891-2902; doi:10.1093/ietfec/e90-a.12.2891 [Abstract] [PDF] [References]  

Information Security Back

Naoki KANAYAMA and Shigenori UCHIYAMA
The Vanstone-Zuccherato Schemes Revisited
IEICE Trans Fundamentals 2007 E90-A: 2903-2907; doi:10.1093/ietfec/e90-a.12.2903 [Abstract] [PDF] [References]  

Kazuhiko MINEMATSU and Toshiyasu MATSUSHIMA
Improved MACs from Differentially-Uniform Permutations
IEICE Trans Fundamentals 2007 E90-A: 2908-2915; doi:10.1093/ietfec/e90-a.12.2908 [Abstract] [PDF] [References]  

Neural Networks and Bioengineering Back

Tsungnan LIN and C. Lee GILES
Group-Linking Method: A Unified Benchmark for Machine Learning with Recurrent Neural Network
IEICE Trans Fundamentals 2007 E90-A: 2916-2929; doi:10.1093/ietfec/e90-a.12.2916 [Abstract] [PDF] [References]  

Shangce GAO, Zheng TANG, Hongwei DAI, and Jianchen ZHANG
An Improved Clonal Selection Algorithm and Its Application to Traveling Salesman Problems
IEICE Trans Fundamentals 2007 E90-A: 2930-2938; doi:10.1093/ietfec/e90-a.12.2930 [Abstract] [PDF] [References]  

Letters Back

Engineering Acoustics Back

Yijing CHU, Heping DING, and Xiaojun QIU
Robust Source Separation with Simple One-Source-Active Detection
IEICE Trans Fundamentals 2007 E90-A: 2939-2944; doi:10.1093/ietfec/e90-a.12.2939 [Abstract] [PDF] [References]  

Digital Signal Processing Back

Moon Ho LEE, Subash Shree POKHREL, and Wen Ping MA
A Class of Cocyclic Quasi Jacket Block Matrix
IEICE Trans Fundamentals 2007 E90-A: 2945-2948; doi:10.1093/ietfec/e90-a.12.2945 [Abstract] [PDF] [References]  

Teruya MINAMOTO, Mitsuaki YOSHIHARA, and Satoshi FUJII
A Digital Image Watermarking Method Using Interval Arithmetic
IEICE Trans Fundamentals 2007 E90-A: 2949-2951; doi:10.1093/ietfec/e90-a.12.2949 [Abstract] [PDF] [References]  

Akira TANAKA and Masaaki MIYAKOSHI
Fast Parameter Selection Algorithm for Linear Parametric Filters
IEICE Trans Fundamentals 2007 E90-A: 2952-2956; doi:10.1093/ietfec/e90-a.12.2952 [Abstract] [PDF] [References]  

Systems and Control Back

Koan-Yuh CHANG and Tsung-Lin CHENG
Covariance Control for Bilinear Stochastic Systems via Sliding Mode Control Concept
IEICE Trans Fundamentals 2007 E90-A: 2957-2961; doi:10.1093/ietfec/e90-a.12.2957 [Abstract] [PDF] [References]  

Information Security Back

Dae Hyun YUM and Pil Joong LEE
Security Analysis of Zhu-Bao's Verifiably Committed Signature
IEICE Trans Fundamentals 2007 E90-A: 2962-2964; doi:10.1093/ietfec/e90-a.12.2962 [Abstract] [PDF] [References]  

Information Theory Back

Ryo NOMURA, Toshiyasu MATSUSHIMA, and Shigeichi HIRASAWA
A Note on the {epsilon}-Overflow Probability of Lossless Codes
IEICE Trans Fundamentals 2007 E90-A: 2965-2970; doi:10.1093/ietfec/e90-a.12.2965 [Abstract] [PDF] [References]  

Communication Theory and Signals Back

Seungwoo HAN, Suckchel YANG, and Yoan SHIN
An Effective SLM-PRSC Hybrid Scheme for OFDM PAPR Reduction
IEICE Trans Fundamentals 2007 E90-A: 2971-2974; doi:10.1093/ietfec/e90-a.12.2971 [Abstract] [PDF] [References]  

Huy G. VU, Ha H. NGUYEN, and David E. DODDS
Performance Bound for Finite-Length LDPC Coded Modulation
IEICE Trans Fundamentals 2007 E90-A: 2975-2978; doi:10.1093/ietfec/e90-a.12.2975 [Abstract] [PDF] [References]  

Image Back

Tze-Yun SUNG and Hsi-Chin HSIN
A Hybrid Image Coder Based on SPIHT Algorithm with Embedded Block Coding
IEICE Trans Fundamentals 2007 E90-A: 2979-2984; doi:10.1093/ietfec/e90-a.12.2979 [Abstract] [PDF] [References]  

Concurrent Systems Back

Kazuhiro OGATA and Kokichi FUTATSUGI
State Machines as Inductive Types
IEICE Trans Fundamentals 2007 E90-A: 2985-2988; doi:10.1093/ietfec/e90-a.12.2985 [Abstract] [PDF] [References]  

To see an article, click its [Full Text] or [PDF] link. To review many abstracts, check the boxes to the left of the titles you want, and click the 'Get All Checked Abstract(s)' button. To see one abstract at a time, click its [Abstract] link.