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IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences 2008 E91-A(4):965-970; doi:10.1093/ietfec/e91-a.4.965
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Copyright © 2008 The Institute of Electronics, Information and Communication Engineers

Special Section on Selected Papers from the 20th Workshop on Circuits and Systems in Karuizawa -- Papers

Novel Architecture of Feedforward Second-Order Multibit {Delta}{Sigma}AD Modulator

Hao SAN1, Hajime KONAGAYA1, Feng XU1, Atsushi MOTOZAWA1, Haruo KOBAYASHI1, Kazumasa ANDO2, Hiroshi YOSHIDA2, Chieto MURAYAMA2 and Kanichi MIYAZAWA2

1 The authors are with the Department of Electronic Engineering, Graduate School of Engineering, Gunma University, Kiryu-shi, 376-8515 Japan. E-mail: san{at}el.gunma-u.ac.jp, 2 The authors are with Toshiba LSI System Support Co., LTD, Kawasaki-shi, 212-0013 Japan.


  Abstract

This paper proposes novel feedforward architecture of the second-order multibit {Delta}{Sigma}AD modulator with single DAC-feedback topology. The {Delta}{Sigma}AD modulator realizes high resolution by oversampling and noise shaping techniques. However, its SNDR (Signal to Noise and Distortion Ratio) is limited by the dynamic range of the input signal and non-idealities of circuit building blocks, particularly by the harmonic distortion in amplifier circuits. A full feedforward {Delta}{Sigma}AD modulator structure has the signal transfer function of unity under ideal circumstances, which means that the signal swings through the loop filter become smaller compared with a feedbacked {Delta}{Sigma}AD modulator. Therefore, the harmonic distortion generated inside the loop filter can be significantly reduced in the feedforward structure because the effect of non-idealities in amplifiers can be suppressed when signal swing is small. Moreover, the reduction of the internal signal swings also relaxes output swing requirements for amplifiers with low supply voltage. However, in conventional feedforward {Delta}{Sigma}AD modulator, an analog adder is needed before quantizer, and especially in a multibit modulator, an additional amplifier is necessary to realize the summation of feedforward signals, which leads to extra chip area and power dissipation. In this paper, we propose a novel architecture of a feedforward {Delta}{Sigma}AD modulator which realizes the summation of feedforward signals without additional amplifier. The proposed architecture is functionally equivalent to the conventional one but with smaller chip area and lower power dissipation. We conducted MATLAB and SPICE simulations to validate the proposed architecture and modulator circuits.

Key Words: {Delta}{Sigma}AD modulator, switched-capacitor, feedforward, multibit

Manuscript received June 26, 2007. Manuscript revised October 5, 2007.


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