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IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences 2008 E91-A(4):957-964; doi:10.1093/ietfec/e91-a.4.957
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Copyright © 2008 The Institute of Electronics, Information and Communication Engineers

Special Section on Selected Papers from the 20th Workshop on Circuits and Systems in Karuizawa -- Papers

An Evaluation Method of the Number of Monte Carlo STA Trials for Statistical Path Delay Analysis

Masanori IMAI1,3, Takashi SATO2, Noriaki NAKAYAMA1,3 and Kazuya MASU2

1 The authors are with Integrated Research Institute, Tokyo Institute of Technology, Yokohama-shi, 226-8503 Japan. E-mail: imai{at}starc.or.jp, 2 The authors are with Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology, Yokohama-shi, 226-8503 Japan., 3 Presently, with Semiconductor Technology Academic Research Center.


  Abstract

We present an evaluation method for estimating the lower bound number of Monte Carlo STA trials required to obtain at least one sample which falls within top-k % of its parent population. The sample can be used to ensure that target designs are timing-error free with a predefined probability using the minimum computational cost. The lower bound number is represented as a closed-form formula which is general enough to be applied to other verifications. For validation, Monte Carlo STA was carried out on various benchmark data including ISCAS circuits. The minimum number of Monte Carlo runs determined using the proposed method successfully extracted one or more top-k % delay instances.

Key Words: SSTA, STA, Monte Carlo STA, timing analysis, ranking

Manuscript received June 26, 2007. Manuscript revised October 6, 2007.


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